+39 06 7827464 info@geb-enterprise.com
GEB Enterprise

GEB Enterprise

FEWE, Fpga Easy Web Editor

The Fewe tool make you able to create an embedded PC expansion by a FPGA

Build Your FPGA System

Easy Fpga Web Editor

Here you can use the FPGA Building Blocks to build your custom applications. Using the Easy Fpga Editor (FEWE) you can choose a board and one of its collections of Building Block (a template). You’ll use the template to build your custom application. Note that just your web browser will be needed. If any of the existing templates didn’t meet your needs. Do not worry! You can have, free of charge, a template tailored to yuor needs, please see below the template request editor.

Build Your Template

Make your Build Block collection

Here you can choose your preferred FPGA Building Blocks (IP). Using the Template Proposal Editor you can select which IP you would use in some of your designs. You’ll have just choose a target board and edit its configuration table on the web. FEWE Template Editor will perform some online prechecks, when all of them will be OK you will send the template request. We will create, free of charge, a custom template that you will use to create your system by the above Easy Fpga Editor.

  • Click here to start the template request editor
  • Click here to start the template request editor Help

View the available Building Blocks

Here the IP list

Lots of IPs can be used in the Fpga Easy Web Editor. The following table shows some of these that have been made available in the FEWE environment. If you like to have others ones please don’t hesitate to contact us by the info request form.

Name Ip Descriptions Doc.
PCIe Altera PCI Express Hard IP
PIOs Parallel bidirectional I/O Port with standard features, including edge sensing and interrupt
PIOb Simply bidirectional Parallel I/O Port with basic features 
IOBUS General purpose I/O bus with up to 24 bits address bits, up to 32 bits data bits, programmable timing, interrupt and optional ready/wait signal
FIFOI 16 bits Input FIFO with status registers and interrupt can be splitted in two byte wide FIFOs
FIFOO 16 bits Output FIFO with status registers and interrupt can be splitted in two byte wide FIFOs
SGDMA The Scatter-Gather Direct Memory Access (SG-DMA) controller core must be used to perform high-speed data transfer between two components. It will be able to transfer data in PC virtual memory space
UART Simply UART with programmable baud rate (Altera IP)
16550 UART (Universal Asynchronous Receiver/Transmitter) compatible with the de-facto standard 16550 found in the PC
SPI  Simply SPI port with multiple Chip Select (Altera IP) 
PWM  Pulse Width GEB IP can drive CC motor with direction control or servo 
I2C  I2C master port (OpenCore IP) 
CFC  The CompactFlash core allows you to connect to CompactFlash storage card 

 

Ip Descriptions Doc.

PCIe

Altera PCI Express Hard IP

PIOs

Parallel bidirectional I/O Port with standard features, including edge sensing and interrupt

PIOb

Simply bidirectional Parallel I/O Port with basic features

IOBUS

General purpose I/O bus with up to 24 bits address bits, up to 32 bits data bits, programmable timing, interrupt and optional ready/wait signal

FIFOI

16 bits Input FIFO with status registers and interrupt can be splitted in two byte wide FIFOs

FIFOO

16 bits Output FIFO with status registers and interrupt can be splitted in two byte wide FIFOs

SGDMA

The Scatter-Gather Direct Memory Access (SG-DMA) controller core must be used to perform high-speed data transfer between two components. It will be able to transfer data in PC virtual memory space

UART

Simply UART with programmable baud rate (Altera IP)

16550

UART (Universal Asynchronous Receiver/Transmitter) compatible with the de-facto standard 16550 found in the PC

SPI

Simply SPI port with multiple Chip Select (Altera IP)

PWM

Pulse Width GEB IP can drive CC motor with direction control or servo

I2C

I2C master port (OpenCore IP)

CFC

The CompactFlash core allows you to connect to CompactFlash storage card